Temperature sensors are widely used in instrumentation and control systems, e.g., to monitor thermal conditions. There are a variety of types of temperature sensors, such as thermistors, resistance temperature detectors (RTDs), thermocouples and Silicon PN junction sensors. An advantage of a Silicon PN junction sensor is that it is easily integrated with Silicon circuitry that processes sensor signals, such as an analog to digital converter (ADC) and voltage to temperature converter. This integration improves the accuracy and cost of a temperature detector system. A bandgap reference temperature sensor is a type of Silicon PN junction sensor.
Conventional temperature measurement is implemented by applying a different current density to one or two pn junctions or diodes, e.g., diode coupled transistors. One current density divided by the other provides a current density ratio. This develops two different voltages across the pn junction(s), which results in a voltage change or delta (Δ), e.g., ΔVbe. Conventionally, different current densities are generated by applying different currents to one transistor or two transistors having the same size, applying the same current to two transistors having different sizes or a combination thereof.
FIG. 1A illustrates a conventional bandgap reference temperature detector. Conventional temperature detector 10 comprises a current source and a sensor. The current source is provided by first and second current sources I1, I2. The sensor is provided by first and second Bipolar Junction Transistors (BJTs) Q1 and Q2. Specifically, first and second BJTs Q1, Q2 are npn BJTs. First and second BJTs Q1, Q2 are diode-connected. The respective base and collector nodes of each of first and second BJTs Q1, Q2 are coupled together. The collector node of first BJT Q1 is coupled to first current source I1. The collector node of second BJT Q2 is coupled to second current source I2. The emitter nodes of first and second BJTs Q1, Q2 are coupled to ground.
As indicated in FIG. 1A, one technique to develop different current densities is an emitter size ratio r where the size of the emitter area of second BJT Q2 is r times the size of first BJT Q1. Providing the same current to transistors having different emitter sizes would result in different current densities. As indicated in FIG. 1A, another technique to develop different current densities is to have the magnitude of second current source I2 be p times the magnitude of first current source I1. Providing different currents to transistors having the same emitter size would result in different current densities. Both techniques may be implemented together. First and second current sources I1, I2 may be provided by Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) powered by supply voltage VDD. As a result of generating different current densities in first and second BJTs Q1, Q2, two different voltages, i.e., Vbe1 and Vbe2, are generated and the difference between them is ΔVbe. This voltage is proportional to absolute temperature (PTAT).
The base to emitter voltages VBE1, VBE2 for respective first and second BJTs Q1, Q2 are given by equation 1.1:
                              V          be                =                              nKT            q                    ⁢                      ln            ⁡                          (                              I                Is                            )                                                          Equation        ⁢                                  ⁢        1.1            where n is an ideality factor of a pn junction diode, k is Boltzmann's constant, T is the temperature in Kelvins, q is the charge of an electron, I is the pn junction diode current, IS is the saturation current and In is the natural logarithm function.
The difference ΔVBE between base to emitter voltages VBE1 and VBE2 is given by equations 1.2, 1.3 and 1.4:
                              Δ          ⁢                                          ⁢                      V            be                          =                              V                          be              ⁢                                                          ⁢              2                                -                      V                          be              ⁢                                                          ⁢              1                                                          Equation        ⁢                                  ⁢        1.2                                          Δ          ⁢                                          ⁢                      V            be                          =                                            nKT              q                        ⁢                          ln              ⁡                              (                                                      p                    *                    I                    ⁢                                                                                  ⁢                    1                                    Is                                )                                              -                                    nKT              q                        ⁢                          ln              ⁡                              (                                                      I                    ⁢                                                                                  ⁢                    1                                                        r                    *                    Is                                                  )                                                                        Equation        ⁢                                  ⁢        1.3                                          Δ          ⁢                                          ⁢                      V            be                          =                              nKT            q                    ⁢                      ln            ⁡                          (                              p                r                            )                                                          Equation        ⁢                                  ⁢        1.4            The difference ΔVBE between base to emitter voltages VBE1 and VBE2 is proportional to absolute temperature (PTAT). Accordingly, the junction voltage difference ΔVBE is referred to as the PTAT voltage. If the current density ratio p/r were designed to be 8, at room temperature of 300 Kelvins, the difference ΔVBE between base to emitter voltages VBE1 and VBE2 is approximately 53.7 mV according to Equation 1.4.
FIG. 1B illustrates another conventional bandgap reference temperature detector. Conventional temperature detector 20 comprises a current source, a switch sw and a sensor. The current source is provided by first and second current sources I1, I2. The sensor is provided by a single BJT Q1. As indicated in FIG. 1B, the magnitude of second current source I2 is N times the magnitude of first current source I1. Providing different currents to single transistor Q1 will generate different current densities in single transistor Q1, where the current density ratio is N. Essentially, conventional temperature detector 20 eliminates second BJT Q2 in conventional temperature detector 10 and adds a switch sw. Single BJT Q1 is a diode coupled npn BJT. The base and collector nodes of single BJT Q1 are coupled together. The emitter node of single BJT Q1 is coupled to ground.
The collector node of single BJT Q1 is alternately coupled, e.g., via a switch, to first and second current sources I1, I2 to generate different current densities in single BJT Q1 having a current density ratio N. As a result of generating different current densities in single BJT Q1, two different voltages, i.e., Vbe1 and Vbe2, are generated and the difference between them is ΔVbe. This voltage is proportional to absolute temperature (PTAT).
The base to emitter voltages VBE1, VBE2 generated by single BJT Q1 in response to application of first and second currents I1, I2 are given by equation 1.1. The difference ΔVBE between base to emitter voltages VBE1 and VBE2 is given by equations 1.2, 1.5 and 1.6:
                              Δ          ⁢                                          ⁢                      V            be                          =                                            nKT              q                        ⁢                          ln              ⁡                              (                                                      N                    *                    I                    ⁢                                                                                  ⁢                    1                                    Is                                )                                              -                                    nKT              q                        ⁢                          ln              ⁡                              (                                                      I                    ⁢                                                                                  ⁢                    1                                    Is                                )                                                                        Equation        ⁢                                  ⁢        1.5                                          Δ          ⁢                                          ⁢                      V            be                          =                              nKT            q                    ⁢                      ln            ⁡                          (              N              )                                                          Equation        ⁢                                  ⁢        1.6            Again, the difference ΔVBE between base to emitter voltages VBE1 and VBE2 is proportional to absolute temperature (PTAT). Conventionally, an analog to digital converter (ADC) and a voltage to temperature converter would convert an analog PTAT, i.e., difference ΔVBE between base to emitter voltages VBE1 and VBE2, to a digital temperature measurement.
There are a number of problems with conventional temperature detectors such as conventional temperature detectors 10 and 20. Generally, it is difficult to manufacture a highly accurate Silicon PN junction sensor because the PTAT voltage ΔVBE is only tens of milliVolts (mV), there may be mismatch between first and second BJTs Q1, Q2, mismatch between first and second current sources I1, I2, e.g., FETs, and there may be a mismatch between other components, which results in mismatch in the design and actual current density ratio. These potential problems may cause several degrees of error in PTAT voltage ΔVBE. Generally, these and other problems require substantial post-processing (e.g. trimming, calibration circuitry) to correct conventional temperature output. In greater detail, although various embodiments may have more problems, five specific problems are addressed below.
First, equations 1.1-1.6 are for ideal performance of conventional temperature detectors 10 and 20. However, operation of their components is unlikely to be ideal. This may induce an error in PTAT voltage ΔVBE. Accordingly adjustments may be necessary.
Second, the actual current density ratio between first and second BJTs Q1, Q2 may not be exactly the current density ratio that the design and equations 1.1-1.6 are based on. This may induce an error in PTAT voltage ΔVBE. Accordingly adjustments may be necessary.
Third, there may be a Beta β (i.e. Ic/Ib) mismatch for first and second BJTs Q1, Q2 at different current densities. Biasing points must be carefully selected in order to render Beta factors negligible. Of course this is difficult to accomplish and adjustments may be necessary.
Fourth, mismatch in the designed and actual ratio of first and second current sources I1, I2 may cause actual bias currents in first and second BJTs Q1, Q2 to be different than designed. Such an error would mean the actual current density ratio is something other than what it was designed to be, which would result in an error in PTAT voltage ΔVBE. Accordingly adjustments may be necessary.
Fifth, parasitic resistance exists between terminals and components. For example, a parasitic resistance is in series with collector and emitter nodes of the PN junction diodes of first and second BJTs Q1, Q2. Parasitic resistance may include, for example, terminals, traces and wires in circuit paths within and between integrated circuits and boards. The detected junction voltage VBE always includes voltage across parasitic resistance. This may induce an error in PTAT voltage ΔVBE. Accordingly adjustments may be necessary.
FIG. 2 illustrates the problem of parasitic resistance causing errors in temperature measurement systems. Cumulative parasitic resistance is shown in series as parasitic resistor Rx coupled to the base and collector nodes of BJT Q1 and as parasitic resistor Ry coupled to the emitter node of BJT Q1. Rather than pn junction voltage Vbe being amplified and processed to determine a temperature measurement, total voltage Vo is amplified and processed to determine a temperature measurement. When stimulus current I1 flows through BJT Q1 and parasitic resistors Rx and Ry total voltage Vo is given by Equations 2.1 and 2.2.
                    Vo        =                              Δ            ⁢                                                  ⁢                          V              BE                                +                      I            ⁢                                                  ⁢            1            ⁢                          (                              N                -                1                            )                        ⁢                          (                              Rx                +                Ry                            )                                                          Equation        ⁢                                  ⁢        2.1                                Vo        =                                            nKT              q                        ⁢                          ln              ⁡                              (                N                )                                              +                      I            ⁢                                                  ⁢            1            ⁢                          (                              N                -                1                            )                        ⁢                          (                              Rx                +                Ry                            )                                                          Equation        ⁢                                  ⁢        2.2            
As indicated in Equations 2.1 and 2.2, cumulative parasitic resistances Rx and Ry will cause errors in voltage and in temperature determined from such erroneous voltage levels. Every Ohm of parasitic resistance could cause a temperature measurement error of 0.7 degrees Celsius. A further problem is that cumulative parasitic resistance is not constant and may vary with fluctuations in temperature. Therefore, corrections during subsequent processing are difficult and unreliable.
These problems are typical in conventional temperature detectors. With so many adjustments necessary to compensate for so many sources of errors, such as non-ideal components and non-ideal performance, it is inevitable that conventional temperature output will contain errors. Thus, there is a need for a temperature detection technique that eliminates or reduces the impact of common sources of error.